;BB0010A.AS -- R6502 Breadboard test program
;use MAS65 to assemble

;04/19/96
;updated 09 OCT 1999.  A special thanks to Justin Smith.
;

; ACIA is hooked to INT
; VIA is hooked to NMI


NMIVECT EQU     $0067           ;RAM vector for NMI
DTA     EQU     $80             ;base of variable table
VIA     EQU     $C000           ;address of 6522 VIA
ACIA    EQU     $D000           ;address of 6551 ACIA
;
; 6522 VIA definitions
;
        ORG     VIA
ORB     .ds     1               ;Output Register B
IRB     EQU     ORB             ;Input Register B
ORA     .ds     1               ;Output Register A
IRA     EQU     ORA             ;Input Register A
DDRB    .ds     1               ;Data Direction Register B
DDRA    .ds     1               ;Data Direction Register A
T1CL    .ds     1               ;read:  T1 counter, low-order
                                ;write: T1 latches, low-order
T1CH    .ds     1               ;T1 counter, high-order
T1LL    .ds     1               ;T1 latches, low-order
T1LH    .ds     1               ;T1 latches, high-order
T2CL    .ds     1               ;read:  T2 counter, low-order
                                ;write: T2 latches, low-order
T2CH    .ds     1               ;T2 counter, high-order
SR      .ds     1               ;Shift Register
ACR     .ds     1               ;Auxiliary Control Register
PCR     .ds     1               ;Peripheral Control Register
IFR     .ds     1               ;Interrupt Flag Register
IER     .ds     1               ;Interrupt Enable Register


;
; 6551 ACIA definitions
;
        ORG     ACIA
ATXM    .ds     1               ;Transmitter Register (write only)
ARCX    EQU     ATXM            ;Receiver Register (read only)
ASTS    .ds     1               ;Status Register (read only)
ARES    EQU     ASTS            ;Soft Reset  (write only)
ACMD    .ds     1               ;Command Register
ACTL    .ds     1               ;Control Register


;
; page zero variable declarations
;
        ORG     DTA
DTA00   .ds     1               ;storage for datum
CT1LO   .ds     1               ;software counter low-order
CT1HI   .ds     1               ;  and high-order bytes


        ORG     $F800


;*********************************************
;****  UTILITY ROUTINES
;*********************************************

;
; initialize UART
;
UINIT   STA     ARES            ;soft reset
        LDA     #$89            ;set specific modes and functions
        STA     ACMD
        LDA     #$1A            ;8-N-1, 2400 baud
        STA     ACTL
        RTS


;
; check VIA as a source of interrupt
;
CKVINT  LDA     IFR             ;check the VIA
        RTS                     ;  do nothing for now.


;*********************************************
;****  I/O ROUTINES
;*********************************************

;
; receive a byte into the system (console input)
; *** for now, just write to Port B of the VIA
;
RCXBYT  AND     #$7F            ;mask high bit out
        STA     ORB             ;update the LEDs
;;        RTS
;; follow through and re-transmit it!!

;
; send a byte out from the system (send to the console)
;
TXMBYT  PHA
        LDA     #50
        TAY
TXMBY2  LDA     ASTS
        AND     #$10            ;txm dta reg empty?
        BNE     TXOUP           ;0=not empty
        DEY
        BNE     TXMBY2
        BEQ     TXMFL           ;fail
TXOUP   PLA
        STA     ATXM            ;send to transmitter
        LDA     #$00            ;set Z-flg=okay
        RTS
TXMFL   PLA                     ;return the character
        RTS                     ;  and NZ=error

;
; interrupt service routine for ACIA
;
ASRV    AND     #$08            ;check rcx reg full
        BEQ     NOBYT
        LDA     ARCX            ;get the byte
        JSR     RCXBYT
NOBYT   PLA
        RTI

;*********************************************
;**** MAIN IRQ SERVICE ROUTINE
;*********************************************
IRQSRV  PHA                     ; save accumulator
        LDA     ASTS            ;check ACIA interrupt
        BMI     ASRV            ;  go if found
        JSR     CKVINT
        PLA                     ; restore accumulator
        RTI

;*********************************************
;**** NMI SERVICE ROUTINES
;*********************************************


HOTNMI  PLA                     ;discard flags
        PLA                     ;discard MSB of return address
        PLA                     ;discard LSB of return address
        RTS


INITNMI LDA     #HOTNMI          ;use LSB
        STA     $67
        LDA     #HOTNMI/256      ;use MSB
        STA     $68
        RTS

NMISRV JMP     (NMIVECT)

;*********************************************
;**** MAIN BOOT ROUTINE -- cold start and hard reset
;*********************************************

BOOTR   NOP                     ;warm up

; some chips need a longer warm-up.
        JSR     DLY00           ;more warm up
;(thank you, Justin.)

        JSR     UINIT           ;initialize ACIA
        JSR     INITNMI         ;set NMI vector

; init the VIA and light LEDs to prove we're running
        LDA     #$FF            ;set all outputs, 11111111 binary
        STA     DDRB            ;set data direction
SFWLP   LDA     #$05
        STA     ORB             ;update the LEDs
        JSR     DLY00           ;software delay
        LDA     #$0A
        STA     ORB             ;update the LEDs
        JSR     DLY00           ;software delay

;some chips, INTs not enabled by default
        CLI                     ; enable INTs
;(and thank you, Justin.)

TCOUNT  EQU     55000
        LDA     #$C0            ;set square wave on PB7
        STA     ACR             ;store into VIA
        LDA     #TCOUNT         ;set low-order byte
        STA     T1CL
        LDA     #TCOUNT/256     ;set high-order byte
        STA     T1CH

;
; and now a software loop
;

        LDA     #$01
        STA     DTA00
SFWLP2  LDA     DTA00
        ADC     #$01
        AND     #$07            ;mask high bits out
        STA     DTA00           ;update the datum
        ORA     #$30            ;add ASCII "0"
        JSR     TXMBYT          ;send to console
        JSR     DLY00           ;software delay
        JMP     SFWLP2


DLY00   LDA     #$00             ;init counter to zero
        STA     CT1LO
        STA     CT1HI
DLY00A  DEC     CT1LO           ;count down again to zero
        BNE     DLY00A
        DEC     CT1HI
        BNE     DLY00A
        RTS

        ORG     $FFF8
        .word   BOOTR
        .word   NMISRV          ; NMI vector
        .word   BOOTR           ; Cold start & reset vector
        .word   IRQSRV          ; IRQ vector
        .end